Asia Symposium on Quality Electronic Design (ASQED)

ASQED 2012 Conference At-a-Glance

Monday, July 9, 2012

1:00pm–4:00pm ASQED Microelectronic Olympiad  
6:00pm–8:00pm

Pre-Registration

 

Tuesday, July 10, 2012

8:00am-9:00am

Registration

 
9:00am–9:15am

Welcome & Introductionan

Exhibits
Open
9:00am–5:00pm

9:15am–10:00am

Keynote 1P1

Applied Research and Technology Transfer in Hong Kong

Dr Nim-kwan Cheung

Chief Executive Officer

Applied Science and Technology Research Institute (ASTRI)

10:00am–10:30am Tea Break & Networking
10:30am–11:15am

Keynote 1P2

Emergence of New Markets: can business survive without a better technology roadmap?

Professor Kamran Eshraghian

President iDataMap Corporation, Australia

Distinguished Professor, CBNU, Korea

11:15am–12:00

Poster Session

12:00–1:30pm

ASQED Lunch Buffet

1:30pm–3:00pm

Session 1A

Design and Optimization of Interconnect

Room: A

Session 1B

Memory Circuits

Room: B

Tutorial T1

Jeff Wilson
Mentor Graphic

Room: C

Tutorial T2

Farhang Yazdani
BoradPak

Room: D

 

3:00pm–3:30pm

Tea Break and Networking

3:30pm–5:30pm

Session 2A

Device Modeling and Automation for Physical Design

Room: A

Session 2B

Analog Circuits

Room: B

Session 2C

Sensors & Nanoelectronics

Room: C

Tutorial T3

Rajiv Joshi
IBM

Room: C

 

Wednesday, July 11, 2012

8:00am-9:00am

Registration
Networking

 
9:00am-9:30am Announcing Microelectronic Olympiad Winners

Exhibits
Open
9:00am–5:00pm

9:30am–10:15am

Keynote 2P1

Tech and Space: A Symbiotic Relationship

Rich Goldman

Vice President, Corporate Marketing & Strategic Alliances, Synopsys

Chief Executive Officer, Synopsys Armenia

10:15am–10:45am

Tea Break & Networking Session

10:450am–11:30am

Keynote 2P2

Recent Development and Progress for Nonvolatile Memory for Embedded Market

Dr. Saied Tehrani

Senior Vice President and Chief Technology Officer, Spansion

11:15am–12:00 Poster Session
12 Noon–1:30pm

Buffet Lunch

1:30pm–3:00pm

Session 3A

Verification

Room: A

Session 3B

Advanced Topics in Circuit and System Design

Room: B

Session 3C

Advanced Packaging: Signal Integrity & Co-Design

Room: C

Tutorial T4

Ozgur Sinanoglu
New York University

Abu Dhabi

 

Room: D

3:00pm–3:30pm

Tea Break and Networking Session

3:30pm–5:30pm

Session 4A

Test

Room: A

Session 4B

Digital VLSI and High Speed Interfaces

Room: B

Session 4C

Advanced Packaging: Process Technology

Room: C

Tutorial T5

Adam Osseiran
Edith Cowan University

Room: D

 

 


Technical Program